Japanese Patent Laid-Open Publication No. 2010-45321A discloses a semiconductor device including a semiconductor substrate (or a semiconductor chip), a support substrate bonded to the front surface of the semiconductor substrate and external connection electrodes arranged on the rear surface of the semiconductor substrate. Circuit elements are incorporated into the front surface of the semiconductor substrate. The circuit elements and the external connection electrodes are electrically connected by conductor portions extending through the semiconductor substrate. A process for manufacturing the semiconductor device includes a step of bonding the support substrate to the front surface of the semiconductor substrate, a step of forming through-holes in the semiconductor substrate, a step of forming the conductor portions in the through-holes and arranging the external connection electrodes on the rear surface of the semiconductor substrate and a step of simultaneously dicing the support substrate and the semiconductor substrate into individual semiconductor devices. A semiconductor device having a so-called chip size package shape is obtained through the process noted above.
In the chip-size-package semiconductor device, the cut surfaces of the semiconductor substrate are exposed on the side surfaces thereof. For that reason, when a plurality of chip-size-package semiconductor devices are arranged on a mounting substrate, consideration needs to be given to the possible misalignment of the semiconductor devices in a mounting process and a great enough gap needs to be left between the adjoining semiconductor devices to prevent a short circuit from occurring between the semiconductor devices. Thus, it is sometimes not possible to sufficiently increase the mounting density.
In the meantime, if transistor elements incorporated into a semiconductor wafer are bipolar elements, the semiconductor wafer becomes a common collector. If the transistor elements are unipolar elements, the semiconductor wafer becomes a common drain. By cutting the semiconductor wafer into an area containing a plurality of transistor elements, it is therefore possible to arrange the transistor elements at an increased density.
In an electronic circuit including a plurality of transistor elements, there are a few instances where connections need to be made between collectors or between drains. Actually, there are many instances where a connection needs to be made between emitters of transistors, between sources of transistors, between a base and a collector of transistors or between a gate and a drain of transistors. For that reason, even if a semiconductor device is configured without isolating the transistor elements incorporated into a semiconductor wafer, the semiconductor device lacks versatility. In actual cases, the transistor elements incorporated into the semiconductor wafer are divided into individual semiconductor chips. Accordingly, it is necessary to leave room for free connection of the transistor elements. This holds true in other semiconductor function elements such as diode elements.